IJMTES – IMPLEMENTATION OF PARALLEL ENCODER ARCHITECTURE FOR LONG POLAR CODES

Journal Title : International Journal of Modern Trends in Engineering and Science

Author’s Name : Monisha D | Arul Karthick V J

Volume 02 Issue 12  Year 2015 

ISSN no: 2348-3121  

Page no: 57-59

Abstract Polar codes represent an emerging class of error-correcting codes with power to approach the capacity of a discrete memory less channel. The main objective is to perform error correction and detection. The proposed new efficient encoder allows high-throughput encoding with small hardware complexity, it can be systematically applied to the design of any polar code and to any level of parallelism. The delay elements can be reduced by new parallel pipelined architecture. This particular architecture uses folding transformation technique as well as register minimization. Pipelining and parallel processing is used to reduce the power consumption.

Keywords— Polar codes, polar encoder, Very Large Scale Integration (VLSI) optimization

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