IJMTES – DESIGN OF FLOATING POINT ARITHMETIC UNIT & TRIGONOMETRIC FUNCTIONS IN FPGA

Journal Title : International Journal of Modern Trends in Engineering and Science

Author’s Name : Sruthi R S | Devika R G

Volume 02 Issue 12  Year 2015

ISSN no: 2348-3121

Page no: 30-35

Abstract Field Programmable Gate Arrays (FPGAs) are increasingly being used for high throughput floating-point computation. Floating point describes a method of representing an approximation of a real number in a way that can support a wide range of values. Many scientific applications require floating point arithmetic because of high accuracy in their calculations. FPGAs are becoming more suitable for supporting high speed floating point arithmetic units. Floating point units are widely used in digital applications such as digital signal processing, digital image processing and multimedia. Many algorithms depend on floating point arithmetic because floating point representation supports wide range. This paper proposes a floating point unit with Arithmetic and Trigonometric operations for floating point numbers based on IEEE 754 standard and to enhance the performance of the system. The arithmetic unit allows various arithmetic operations such as, Addition, Subtraction, Multiplication and Division on floating point numbers. It is synthesized and simulated on the Virtex-6 FPGA board using Xilinx ISE Design Suite 14.5 and Modelsim SE 6.5b.

Keywords FPGA; Floating point; IEEE754 standard; Virtex-6

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