Journal Title : International Journal of Modern Trends in Engineering and Science
Author’s Name : Sheik Azhar | M S Anuradha
Volume 02 Issue 12 Year 2015
ISSN no: 2348-3121
Page no: 41-46
Abstract— The clock distribution network consumes nearly 70% of the total power consumed by the IC, since this is the only signal which has the highest switching activity. Normally for a multi clock domain network we develop a multiple PLL to cater the need, this project aim for developing a low power modified multiband network which will supply for the multi clock domain network. This project is highly useful and recommended for communication applications like Bluetooth, Zigbee. Frequency synthesizer is one of the important elements for wireless communication application. The speed of VCO and prescaler determines how fast the frequency synthesizer. The proposed modified multimodulus consumes less power taken as average and has a maximum operating frequency of 6.2 GHz respectively. Here DSCH and Microwind are used to implement the above design.
Keywords— Multimodulus, Frequency Synthesizer, Prescaler, Power Consumption, PLL
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